DiscoverHardware-Conscious Data Processing (ST 2025) - tele-TASK
Hardware-Conscious Data Processing (ST 2025) - tele-TASK
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Hardware-Conscious Data Processing (ST 2025) - tele-TASK

Author: Prof. Dr. Tilmann Rabl

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Description

Hardware development continuously advances, with different technologies improving at different paces. While the number of transistors in a CPU package grows, the single-core performance stagnates due to physical limitations. These trends require changes in data processing to keep database management systems efficient. In this lecture, we will take a look at current computer architectures and accelerator technologies and how they can be used for efficient data processing. We will cover CPU and memory architecture, the storage hierarchy, modern memory and storage technologies, such as NVMe, fast interconnects, such as Infiniband, NVLink, and CXL, and accelerators, such as GPUs and FPGAs. The course has a significant practical part, where the students learn to implement data structures and algorithms tailored to hardware-conscious data processing.
25 Episodes
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Task 4: GPU Join

Task 4: GPU Join

2025-07-1512:08

Summary

Summary

2025-07-0901:16:39

Data Processing on GPUs II

Data Processing on GPUs II

2025-07-0201:24:25

Data Processing on GPUs

Data Processing on GPUs

2025-07-0101:11:39

Networking

Networking

2025-06-2001:17:14

Storage

Storage

2025-06-1801:12:49

Task 3: Buffer Manager

Task 3: Buffer Manager

2025-06-1722:24

Compute Express Link

Compute Express Link

2025-06-1101:26:16

Processing in Memory

Processing in Memory

2025-06-1001:22:48

Multicore Parallelism

Multicore Parallelism

2025-05-2101:30:03

Data Structures

Data Structures

2025-05-2001:26:54

Profiling

Profiling

2025-05-1301:17:40

Vectorized Execution

Vectorized Execution

2025-05-0701:25:37

Query Execution Models

Query Execution Models

2025-04-3001:23:10

Prefetching

Prefetching

2025-04-2901:24:37

Instruction Execution

Instruction Execution

2025-04-2301:24:40

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