DiscoverEmbedded EdgeDesigning with Chiplets To Build The Dream Chip
Designing with Chiplets To Build The Dream Chip

Designing with Chiplets To Build The Dream Chip

Update: 2023-02-10
Share

Description

In this episode, we talk about chiplets, 3D stacking, heterogenous integration, and multi-die systems design. Stanford University’s Subhasish Mitra talks about his keynote at the HiPEAC conference, where he talked about using computation immersed in memory to break down the memory wall and the scaling wall and build a dream chip delivering 1000x energy efficiency. And then, we talk to Cadence, Synopsys, and Eliyan about some of the opportunities and challenges for chiplet design.

Comments 
loading
00:00
00:00
1.0x

0.5x

0.8x

1.0x

1.25x

1.5x

2.0x

3.0x

Sleep Timer

Off

End of Episode

5 Minutes

10 Minutes

15 Minutes

30 Minutes

45 Minutes

60 Minutes

120 Minutes

Designing with Chiplets To Build The Dream Chip

Designing with Chiplets To Build The Dream Chip

AspenCore